1. Field of the Invention
The present invention relates to an integrated circuit lead frame and a method of producing the same, and particularly relates to an integrated circuit lead frame for mounting an integrated circuit chip thereon and a method of producing the same.
2. Description of the Related Art
FIG. 11 is a plan view illustrating an example of a conventional lead frame for mounting an integrated circuit chip thereon. The reference numeral 1 represents a lead frame formed by working a thin metal plate. In the lead frame 1, outer leads 2 ape connected to inner leads 3 through a connection portion called a damper 6, and a substantially square die-pad 8 for mounting an integrated circuit chip thereon is provided at a center portion of the lead frame 1 with a predetermined distance from top end portions of the inner leads 3 and supported at its four corners by die-pad suspension leads 9, 9a, 9b and 9c which are connected to the damper 6.
In assembling an integrated circuit using such a lead frame, as shown in FIG. 12, wire bonding is performed so as to connect respective electrodes 11 of an integrated circuit chip 11 fixed on the die-pad 8 to the corresponding inner leads 3 through metal wires 12.
In such a wire bonding process, in order to improve the bonding position accuracy between the respective electrodes 11 of the integrated circuit chip 10 and the corresponding inner leads 3, positional correction is performed on the integrated circuit chip 10 side as well as on the inner leads 3 side before starting wire bonding, bonding positions are decided on the basis of the correction values, and then the wire bonding is cart ed out.
In this case, for the positional correction on the inner leads 3 side, generally, a desired one inner lead, or two inner leads, for example, 3 and 3m, adjacent to a pair of opposite die-pad suspension leads 9 and 9a respectively as shown in FIG. 11 are used, and correction is made while, at a top end portion 4 of each of the inner leads 3 and 3m, a target, that is, a peripheral shape including a corner portion 7 formed between the top end portion 4 and a side portion 5 thereof as shown in FIG. 12, is recognized by using an image recognition apparatus.
Further, in order to clarify the recognition/correction position on the inner lead 3, another method in which a hole 13 is provided in the inner lead 3 as shown in FIG. 13 has been used. In FIGS. 12 and 13, each of hatched portions 14 and 15 shows an area of a shape image to be stored in the case of using an image recognition apparatus.
Recently, as functions of a semiconductor device increases, a demand for increasing the number of input/output terminals of an integrated circuit has become high sharply, and a semiconductor device having more than 200 pins has appeared today.
In order to respond to such a demand, a measure to form a multi-pin lead frame by making inner leads thereof very small has been progressed. As a result, the width of the top end portion of reach inner lead which has been 0.3 mm or more becomes narrow to reach 0.1 mm. Accordingly, the following problem has occurred in performing bonding position correction on the inner lead side.
(1) If the inner leads 3 are made very small, the shapes of the top end portions 4 of the respective inner leads 3 become substantially the same as shown in FIG. 14, so that the respective inner leads 3 have no difference in shape, that is, in shape features, such as a lead width, and an angle formed at a top end corner portion, and so on. PA0 (2) In addition, it has been difficult to realize the method in which a hole 13 is formed in an objective inner lead 3, which has been described with reference to FIG. 13, since the width of the inner lead 3 is very narrow.
It is therefore difficult to distinguish adjacent inner leads 3, 3a . . . so that a worker and an image recognition apparatus make an error in recognizing an objective inner lead 3 in the above-mentioned method to thereby erroneously judge that an inner lead, for example 3a, other than the objective inner lead 3 is the objective inner lead to be recognized and corrected as shown in FIG. 15, and the inner lead 3a is connected not to a corresponding electrode 11b of the integrated circuit chip 10 but to an erroneous electrode 11a. Thus, sometimes, there occurs a case where bonding is carried out with extreme positional displacement.